Designing a High Frequency Amplifier

1. The Task

Designing an amplifier to amplify frequencies between 10kHz – 100kHz with a maximum peak-to-peak input voltage of 0.1V using transistors. The amplifier should be able to run a load of 8 Ohms.

2. Introduction

Amplifiers are highly used in the industry. They are widely used to amplify a small signal. Usually, those amplifier modules are available in the market. They are categorized according to their amplification factor (gain), output power, input and output impedance, and bandwidth. When the operating frequency of the amplifier increases, the design becomes more complex.

Our design consists of 3 amplifier stages. In the first stage, we used common-collector amplifier configuration, in the second stage common-emitter configuration and, as the final stage, we used a Darlington pair for power amplification. The reason for using a common collector amplifier as the first stage is, in an amplifier, we need to have a higher input impedance in order to reduce the loading effect. The loading effect is simply, drawing much current from the source by the amplifier. The common-collector configuration gives a fairly high input impedance. The second stage can be considered as the voltage amplification stage. We used a BJT amplifier which operates in common emitter configuration for this. Since the amplifier needs run a load having a small input impedance like 8 ohms, the output of the amplifier should be able to provide enough current. Therefore, power amplification is mandatory to achieve this although we have a significant voltage in no-load conditions. So, we used a Darlington pair which have  significant current gain, as the final stage.

For interconnecting these stage, we used capacitor coupling method. Therefore, we can do DC calculation for each stage separately without considering the effect from other stages. But for AC calculations, we cannot do that. 

3. Design Steps

Stage 01 

As mentioned before, a common collector BJT amplifier is used as the input stage. The circuit diagram is shown below and now let's calculate the resistor values.

Figure 1

For DC analysis, let's assume the following conditions.

1. Vcc = 12V

2. VE = 6V

3. Ic = 1.25mA

4. VBE = 0.7V

\begin{equation}R_{3} = \frac{V_{E}}{I_{E}} \approx \frac{V_{E}}{I_{C}} = \frac{6}{1.25\times 10^{-3}} \approx 4.7k\Omega \end{equation} 

Let's take R1 as 22kOhms. Then, R2 can be found as,

\begin{equation} \frac{R_{2}}{R_{1}+R_{2}}\times V_{CC} = V_{B} \Rightarrow \frac{R_{2}}{R_{2}+22\times 10^{3}} \times 12 = 6 + 0.7 \Rightarrow R_{2} \approx 27k\Omega \end{equation} 

Stage 02

Stage 02 is used for voltage amplification. Therefore, we use the common emitter configuration of a BJT as the second stage The circuitry is shown below.

 

Figure 2

In the above circuit, R7 is used for the thermal stability of the transistor. When the transistor is operating, it's getting heated. Then, it's P-N junction temperature increases. This will increase the thermally generated electron-hole pairs resulting an increase in the collector current. When the collector current increases, the transistor gets much heated and this thing happens indefinitely until the transistor got destroyed. This scenario is called as thermal runaway. 

But, what happens if we put R7 there? When the collector current increases, emitter current increases. Since R7 is there, this will increase the voltage drop across R7 according to Ohm's  law. Voltage drop increases means, voltage at the emitter terminal increases. Since the voltage of the base terminal is approximately constant (voltage divider) this will decrease the base-emitter voltage (VBE). Then, base current reduces and as a result of that, collector current reduces. Therefore, by adding R7 we could stop rising the collector current indefinitely thus achieving thermal stability for the amplifier. 

When you consider the AC signal path (we will discuss this in detail later) a fraction of useful signal power will be dissipated through R7. Therefore, adding R7 will result in a reduction of the amplifier gain. You know capacitors can pass AC signals although the DC signals can't. Therefore, adding a bypass capacitor (C3) parallel to R7 will reduces the AC signal dissipation through R7.

For the calculations in this stage, we need the AC equivalent circuit also which is shown below.

Figure 3

 

In the circuit above, the π-model of a transistor is used as the AC-equivalent of a BJT. 

For calculations, let's assume the following conditions.

1. IC,Q = 15mA
2. VCE,Q = 6V
3. β = 200

4. Av = -200 (Open circuit voltage gain)

5. VBE,Q = 0.7V

Equation for the open circuit voltage gain can be written as,

\begin{equation} A_{V} = \frac{v_{o}}{v_{i}} = \frac{-g_{m}v_{\pi } (r_{0} || R_{6})}{v_{\pi } } = -g_{m} (r_{0}||R_{6}) \approx -g_{m}R_{6} \end{equation}

In the above equation we can neglect r0 since it is a much larger value compared to R6 in general. Now, let's calculate gm. Consider the thermal voltage as 25mV at room temperature.

\begin{equation} g_{m} = \frac{I_{C,Q}}{V_{T}} = \frac{15\times 10^{-3}}{25\times 10^{-3}} = 0.6\Omega ^{-1}\end{equation}

Then, R6 can be obtained as,

 \begin{equation} R_{6} = \frac{-A_{v}}{g_{m}} = \frac{-(-200)}{0.6} \approx 330 \Omega \end{equation} 

For calculating R7 we can write Kirchhoff's  voltage law across CE loop.

 \begin{equation} R_{6}I_{C,Q} + V_{CE,Q} + I_{E,Q}R_{7} = V_{CC} \end{equation} 

\begin{equation} R_{7} \approx \frac{V_{CC} - R_{6}I_{C,Q}-V_{CE,Q}}{I_{C,Q}} = \frac{12 - 330\times 15\times 10^{-3}-6}{15\times 10^{-3}} = 70 \Omega\end{equation}

Now we have to find R4 and R5. Let's take R5 as 5.6kOhms. Since we consider this as a voltage divider in the calculations, take the current across R5 is approximately 6 times the base current. Since we know the collector current at quiescent point (IC,Q) and β, we can find the base current IB as,

\begin{equation} I_{B} = \frac{I_{C,Q}}{\beta } = \frac{15\times 10^{-3}}{200} = 0.075mA \end{equation}

 \begin{equation} I_{R_{5}} = 6\times I_{B} = 0.45mA \end{equation} 

 Now we can find base voltage (VB) as,

 \begin{equation} V_{B} = I_{R_{5}}\times R_{5} = 0.45\times 10^{-3}\times 5.6\times 10^{3} = 2.52V \end{equation} 

 Finally, obtain R4 as,

 \begin{equation} R_{4} \approx \frac{V_{CC}-V_{B}}{I_{R_{5}}} = \frac{12-2.52}{0.45\times 10^{-3}} \approx 21k\Omega \end{equation} 

We calculated all the resistor values in this stage. Now we need to find a suitable value for C3; the emitter-bypass capacitor. In general this capacitor is selected such that, 10 times it's impedance is less than or equal to emitter resistance. That is,

\begin{equation} 10X_{C_{3}} \leqslant R_{7} \end{equation}

We know that, 

\begin{equation} X_{C_{3}} = \frac{1}{2\pi fC_{3}} \end{equation} 

For the frequency 'f' in the above equation we should use the lower cutoff frequency of the amplifier which is 10kHz. It is because here the inequality is based on impedance. Therefore, if we set the inequality for lowest value of frequency, it is always true for the upper cutoff frequency as well since 'f' is in the denominator. So, we can find the minimum value for C3 as,

\begin{equation} C_{3} \geqslant \frac{10}{2\pi fR_{7}} = \frac{10}{2\pi \times 10\times 10^{3}\times 70} = 2.27\mu F \end{equation}

Value of decoupling capacitors is not critical. Purpose of these decoupling capacitors is that, they should pass the AC signals in the desired frequency range and block DC signals. Therefore 470uF will be used as the decoupling capacitor value.

Stage 03

Stage 03 is the power amplification stage. There are various transistor configurations exist for doing this. We will be using a Darlington pair which has a very high current gain. The circuitry for this stage is shown below.

Figure 4

For calculations, let's assume the following conditions.

1. VE,Q = 6V

2. IC,Q = 900mA

3. β² = 2500

First, let's calculate R10.

\begin{equation} R_{10} = \frac{V_{E,Q}}{I_{C,Q}} = \frac{6}{900\times 10^{-3}} \approx 6.67\Omega \end{equation}

Now let's find R8 and R9. Similar to what we did for the second stage, consider the current through R9 is 6 times the base current (IB). Take R9 as 3.6kOhms. So, IB can be found as,

\begin{equation} I_{B} = \frac{I_{C,Q}}{\beta^{2} } = \frac{900\times 10^{-3}}{2500} = 0.36mA \end{equation} 

\begin{equation} I_{R_{9}} = 6\times I_{B} = 2.16mA \end{equation} 

 Now we can find base voltage (VB) as,

\begin{equation} V_{B} = I_{R_{9}}\times R_{9} = 2.16\times 10^{-3}\times 3.6\times 10^{3} = 7.78V \end{equation}

Finally, obtain R8 as,

 

\begin{equation} R_{8} \approx \frac{V_{CC}-V_{B}}{I_{R_{9}}} = \frac{12-7.78}{2.16\times 10^{-3}} \approx 1.95k\Omega \end{equation} 

Now we have completed the DC analysis and we found all the component values in each stages. The next important step is impedance matching between each amplifier stages. This is necessary for achieving the maximum performance of the amplifier. If impedance is not matched properly, signal reflections may be occurred. 

First, let's calculate the input and output impedance of each stage. Consider the stage 01. The AC equivalent circuit is shown below.

Figure 5

 

\begin{equation} R_{out} = R_{3} || \frac{r\pi +(R_{1}||R_{2})}{\beta +1} \end{equation}

 

\begin{equation} r\pi = \frac{\beta }{g_{m}} = \frac{\beta }{\frac{I_{C,Q}}{V_T}} = \frac{200}{\frac{1.25\times 10^{-3}}{25\times 10^{-3}}} = 4k\Omega \end{equation}

 

 \begin{equation} R_{out} = 4.7\times 10^{3} || \frac{4\times 10^{3} +22\times 10^{3}||27\times 10^{3}}{200 +1} = 78.87\Omega \end{equation} 

Now, let's calculate the input and output impedance of stage 02. The AC equivalent circuit is shown above (Figure 3).

\begin{equation} R_{in} = R_{4} || R_{5} || r_{\pi } = 21\times 10^{3} || 5.6\times 10^{3}|| \frac{200}{0.6} = 309.96\Omega \end{equation} 

\begin{equation} R_{out} = r_{0} || R_{6} \approx R6 = 330\Omega \end{equation}

Then, we need to find the input impedance of stage 03. But, we cannot perform small signal analysis for this. Instead, large signal analysis needs to be performed since we are after the voltage amplification stage. By the time I am doing this project, large signal analysis is out of the scope. Therefore, I am not going to match the impedance between stage 2 and stage 3. This will cause, we are not getting the maximum performance of the amplifier but still we can have a significant performance.

So, in order to match the impedance between stage 1 and stage 2, let's add a series resistor between those stages. The value of the resistor can be calculated as,

\begin{equation} R_{match} = 309.96 - 78.87 \approx 230\Omega \end{equation}

4. Simulation 

The circuit was simulated using NI-Multisim circuit simulator. Simulation schematic is shown below.

Figure 6

 

Our simulation results are shown below.

 

Output waveform for a 10kHz, 100mV peak-to-peak input signal

 

Figure 7

 

The above waveform corresponds to a 10kHz, 100mV peak-to-peak input signal. Red trace corresponds to input signal and for that channel of the oscilloscope, vertical scale is 50mV/division. The green trace corresponds to output signal and for that channel of the oscilloscope, vertical scale is 1V/division. Therefore according to the simulation, we are getting a voltage gain more than 40. 

Output waveform for a 100kHz, 100mV peak-to-peak input signal 

 

Figure 8

 

The above waveform corresponds to a 100kHz, 100mV peak-to-peak input signal. Red trace corresponds to input signal and for that channel of the oscilloscope, vertical scale is 50mV/division. The green trace corresponds to output signal and for that channel of the oscilloscope, vertical scale is 1V/division.

Magnitude Response and Phase Response

 

Figure 9

 

We could obtain a constant magnitude response in the desired frequency range and a linear phase response which are necessary for a good amplifier design.